Model { Name "PMBLDC_Normal" Version 7.1 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.155" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on SampleTimeColors off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off Created "Sun May 04 10:25:49 2008" Creator "sathish" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "LLReddy" ModifiedDateFormat "%" LastModifiedDate "Fri Nov 06 18:40:22 2009" RTWModifiedTimeStamp 0 ModelVersionFormat "1.%" ConfigurationManager "None" SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.4.0" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 2 Version "1.4.0" StartTime "0.0" StopTime "0.5" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "ode23tb" SolverName "ode23tb" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Non-adaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Specified" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 3 Version "1.4.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on InspectSignalLogs off SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Array { Type "Cell" Dimension 5 Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "InitFltsAndDblsToZero" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" PropName "DisabledProps" } Version "1.4.0" BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off EnforceIntegerDowncast on ExpressionFolding on ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off OptimizeModelRefInitCode off LifeSpan "inf" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off } Simulink.DebuggingCC { $ObjectID 5 Version "1.4.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "none" CheckSSInitialOutputMsg on CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" ModelReferenceSimTargetVerbose off UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" StrictBusMsg "Warning" LoggingUnavailableSignals "error" BlockIODiagnostic "none" } Simulink.HardwareCC { $ObjectID 6 Version "1.4.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.4.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferenceSigSizeVariationType "Always allowed" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 8 Array { Type "Cell" Dimension 1 Cell "IncludeHyperlinkInReport" PropName "DisabledProps" } Version "1.4.0" SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off RTWCompilerOptimization "Off" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 9 Array { Type "Cell" Dimension 16 Cell "IgnoreCustomStorageClasses" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" PropName "DisabledProps" } Version "1.4.0" ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 10 Array { Type "Cell" Dimension 15 Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } Version "1.4.0" TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on CombineOutputUpdateFcns off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off AutosarCompliant off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } hdlcoderui.hdlcc { $ObjectID 11 Description "HDL Coder custom configuration component" Version "1.4.0" Name "HDL Coder" Array { Type "Cell" Dimension 1 Cell "" PropName "HDLConfigFile" } HDLCActiveTab "0" } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } BlockParameterDefaults { Block { BlockType BusCreator Inputs "4" DisplayOption "none" UseBusObject off BusObject "BusObject" NonVirtualBus off } Block { BlockType BusSelector OutputAsBus off } Block { BlockType DataTypeConversion OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit via back propagation" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Inherit via back propagation" LockScale off ConvertRealWorld "Real World Value (RWV)" RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Demux Outputs "4" DisplayOption "none" BusSelectionMode off } Block { BlockType Derivative LinearizePole "inf" } Block { BlockType DiscreteIntegrator IntegratorMethod "Integration: Forward Euler" gainval "1.0" ExternalReset "none" InitialConditionSource "internal" InitialCondition "0" InitialConditionMode "State and output" SampleTime "1" OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Inherit via internal rule" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow off LimitOutput off UpperSaturationLimit "inf" LowerSaturationLimit "-inf" ShowSaturationPort off ShowStatePort off IgnoreLimit off StateMustResolveToSignalObject off RTWStateStorageClass "Auto" } Block { BlockType Display Format "short" Decimation "10" Floating off SampleTime "-1" } Block { BlockType EnablePort StatesWhenEnabling "held" ShowOutputPort off ZeroCross on } Block { BlockType From IconDisplay "Tag" TagVisibility "local" } Block { BlockType Fcn Expr "sin(u[1])" SampleTime "-1" } Block { BlockType Gain Gain "1" Multiplication "Element-wise(K.*u)" ParamMin "[]" ParamMax "[]" ParameterDataTypeMode "Same as input" ParameterDataType "fixdt(1,16,0)" ParameterScalingMode "Best Precision: Matrix-wise" ParameterScaling "[]" ParamDataTypeStr "Inherit: Same as input" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Goto IconDisplay "Tag" } Block { BlockType Ground } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchByCopyingInsideSignal off Interpolate on } Block { BlockType Integrator ExternalReset "none" InitialConditionSource "internal" InitialCondition "0" LimitOutput off UpperSaturationLimit "inf" LowerSaturationLimit "-inf" ShowSaturationPort off ShowStatePort off AbsoluteTolerance "auto" IgnoreLimit off ZeroCross on ContinuousStateAttributes "''" } Block { BlockType Logic Operator "AND" Inputs "2" IconShape "rectangular" AllPortsSameDT on OutDataTypeMode "Logical (see Configuration Parameters: Optimization)" LogicDataType "uint(8)" OutDataTypeStr "Inherit: Logical (see Configuration Parameters: Optimization)" SampleTime "-1" } Block { BlockType Math Operator "exp" OutputSignalType "auto" SampleTime "-1" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on } Block { BlockType Mux Inputs "4" DisplayOption "none" UseBusObject off BusObject "BusObject" NonVirtualBus off } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" SignalType "auto" SamplingMode "auto" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType PMComponent SubClassName "unknown" } Block { BlockType Product Inputs "2" Multiplication "Element-wise(.*)" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType Selector NumberOfDimensions "1" IndexMode "One-based" InputPortWidth "-1" SampleTime "-1" } Block { BlockType SignalSpecification Dimensions "-1" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" SignalType "auto" SamplingMode "auto" } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Switch Criteria "u2 >= Threshold" Threshold "0" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Inherit via internal rule" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on ZeroCross on SampleTime "-1" } Block { BlockType ToWorkspace VariableName "simulink_output" MaxDataPoints "1000" Decimation "1" SampleTime "0" FixptAsFi off } Block { BlockType Terminator } Block { BlockType TransportDelay DelayTime "1" InitialOutput "0" BufferSize "1024" FixedBuffer off TransDelayFeedthrough off PadeOrder "0" } Block { BlockType UnitDelay X0 "0" SampleTime "1" StateMustResolveToSignalObject off RTWStateStorageClass "Auto" } Block { BlockType PMIOPort } Block { BlockType Abs ZeroCross on SampleTime "-1" OutMax "[]" OutDataTypeMode "Same as input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on } Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "fixdt(1,16,0)" ConRadixGroup "Use specified scaling" OutScaling "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" SampleTime "inf" FramePeriod "inf" } Block { BlockType RelationalOperator Operator ">=" InputSameDT on LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimization)" LogicDataType "uint(8)" OutDataTypeStr "Inherit: Logical (see Configuration Parameters: Optimization)" ZeroCross on SampleTime "-1" } Block { BlockType Saturate UpperLimit "0.5" LowerLimit "-0.5" LinearizeAsGain on ZeroCross on SampleTime "-1" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as input" LockScale off RndMeth "Floor" } Block { BlockType Sin SineType "Time based" TimeSource "Use simulation time" Amplitude "1" Bias "0" Frequency "1" Phase "0" Samples "10" Offset "0" SampleTime "-1" VectorParams1D on } Block { BlockType Trigonometry Operator "sin" OutputSignalType "auto" SampleTime "-1" } } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Arial" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "PMBLDC_Normal" Location [2, 78, 1005, 701] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" ReportName "simulink-default.rpt" Block { BlockType Sum Name "Add1" Ports [2, 1] Position [615, 525, 635, 545] ShowName off IconShape "round" Inputs "|+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add3" Ports [2, 1] Position [320, 525, 340, 545] ShowName off IconShape "round" Inputs "|+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType BusSelector Name "Bus\nSelector" Ports [1, 6] Position [935, 246, 940, 414] ShowName off OutputSignals "Stator current is_a (A),Stator current is_b (A),Stator current is_c (A),Stator back EMF e_a (V),Electromagnetic torque Te (N*m),Rotor speed wm (rad/s)" Port { PortNumber 1 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 2 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 3 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 4 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 5 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } Port { PortNumber 6 Name "" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType BusSelector Name "Bus\nSelector1" Ports [1, 1] Position [925, 193, 930, 217] ShowName off OutputSignals "Hall effect signal h_a,Hall effect signal h_b,Hall effect signal h_c" OutputAsBus on } Block { BlockType Reference Name "C" Ports [0, 0, 0, 0, 0, 1, 1] Position [370, 290, 400, 345] Orientation "down" NamePlacement "alternate" AttributesFormatString "\\n" DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Elements/Parallel RLC Branch" SourceType "Parallel RLC Branch" PhysicalDomain "powersysdomain" SubClassName "unknown" LeftPortType "p1" RightPortType "p1" LConnTagsString "a" RConnTagsString "__new0" BranchType "C" Resistance "1" Inductance "1e-3" SetiL0 off InitialCurrent "0" Capacitance "100e-6" Setx0 off InitialVoltage "0" Measurements "None" } Block { BlockType Constant Name "Constant" Position [720, 235, 750, 265] Value "3" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant4" Position [200, 519, 275, 551] ShowName off Value "2500" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Reference Name "Current Measurement" Ports [0, 1, 0, 0, 0, 1, 1] Position [450, 253, 475, 277] DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Measurements/Current Measurement" SourceType "Current Measurement" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" PhasorSimulation off OutputType "Complex" PSBequivalent "0" } Block { BlockType Reference Name "Current Measurement1" Ports [0, 1, 0, 0, 0, 1, 1] Position [250, 413, 275, 437] DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Measurements/Current Measurement" SourceType "Current Measurement" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" PhasorSimulation off OutputType "Complex" PSBequivalent "0" } Block { BlockType SubSystem Name "Decoder" Ports [1, 1] Position [735, 599, 820, 641] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Decoder" Location [12, 86, 1004, 689] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Hall\n" Position [25, 43, 55, 57] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType DataTypeConversion Name "Data Type Conversion1" Position [425, 169, 470, 191] ShowName off OutDataType "sfix(16)" OutScaling "2^0" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType DataTypeConversion Name "Data Type Conversion2" Position [430, 104, 475, 126] ShowName off OutDataType "sfix(16)" OutScaling "2^0" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType DataTypeConversion Name "Data Type Conversion3" Position [425, 234, 470, 256] ShowName off OutDataType "sfix(16)" OutScaling "2^0" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType DataTypeConversion Name "Data Type Conversion4" Position [425, 304, 470, 326] ShowName off OutDataType "sfix(16)" OutScaling "2^0" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType DataTypeConversion Name "Data Type Conversion5" Position [425, 384, 470, 406] ShowName off OutDataType "sfix(16)" OutScaling "2^0" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType DataTypeConversion Name "Data Type Conversion6" Position [425, 454, 470, 476] ShowName off OutDataType "sfix(16)" OutScaling "2^0" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType Demux Name "Demux1" Ports [1, 3] Position [165, 31, 170, 69] BackgroundColor "black" ShowName off Outputs "3" DisplayOption "bar" } Block { BlockType Demux Name "Demux2" Ports [1, 3] Position [165, 96, 170, 134] BackgroundColor "black" ShowName off Outputs "3" DisplayOption "bar" } Block { BlockType Logic Name "Logical\nOperator1" Ports [1, 1] Position [95, 34, 125, 66] Operator "NOT" AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "Logical\nOperator2" Ports [2, 1] Position [375, 96, 405, 129] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "Logical\nOperator3" Ports [2, 1] Position [370, 161, 400, 194] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "Logical\nOperator4" Ports [2, 1] Position [370, 226, 400, 259] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "Logical\nOperator5" Ports [2, 1] Position [370, 296, 400, 329] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "Logical\nOperator6" Ports [2, 1] Position [370, 376, 400, 409] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "Logical\nOperator7" Ports [2, 1] Position [370, 446, 400, 479] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Mux Name "Mux1" Ports [3, 1] Position [720, 231, 725, 329] ShowName off Inputs "3" DisplayOption "bar" } Block { BlockType Sum Name "Sum1" Ports [2, 1] Position [670, 270, 690, 290] ShowName off Inputs "+-" InputSameDT off OutDataTypeMode "double" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "double" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum2" Ports [2, 1] Position [670, 240, 690, 260] ShowName off Inputs "+-" InputSameDT off OutDataTypeMode "double" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "double" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Sum3" Ports [2, 1] Position [670, 300, 690, 320] ShowName off Inputs "+-" InputSameDT off OutDataTypeMode "double" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "double" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "emf_abc" Position [770, 273, 800, 287] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "Hall\n" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical\nOperator1" DstPort 1 } Branch { Points [0, 65] DstBlock "Demux2" DstPort 1 } } Line { SrcBlock "Logical\nOperator1" SrcPort 1 DstBlock "Demux1" DstPort 1 } Line { SrcBlock "Demux2" SrcPort 3 Points [10, 0; 0, 110] Branch { DstBlock "Logical\nOperator4" DstPort 1 } Branch { Points [0, 165] DstBlock "Logical\nOperator6" DstPort 2 } } Line { SrcBlock "Demux2" SrcPort 2 Points [30, 0; 0, 55] Branch { DstBlock "Logical\nOperator3" DstPort 1 } Branch { Points [0, 150] DstBlock "Logical\nOperator5" DstPort 2 } } Line { SrcBlock "Demux2" SrcPort 1 Points [45, 0] Branch { DstBlock "Logical\nOperator2" DstPort 1 } Branch { Points [5, 0; 0, 365] DstBlock "Logical\nOperator7" DstPort 2 } } Line { SrcBlock "Demux1" SrcPort 3 Points [75, 0; 0, 125] Branch { DstBlock "Logical\nOperator3" DstPort 2 } Branch { Points [0, 270] DstBlock "Logical\nOperator7" DstPort 1 } } Line { SrcBlock "Demux1" SrcPort 2 Points [100, 0; 0, 70] Branch { Points [0, 265] DstBlock "Logical\nOperator6" DstPort 1 } Branch { DstBlock "Logical\nOperator2" DstPort 2 } } Line { SrcBlock "Demux1" SrcPort 1 Points [125, 0; 0, 205] Branch { Points [0, 5] DstBlock "Logical\nOperator4" DstPort 2 } Branch { Points [0, 60] DstBlock "Logical\nOperator5" DstPort 1 } } Line { SrcBlock "Logical\nOperator2" SrcPort 1 DstBlock "Data Type Conversion2" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "Mux1" DstPort 1 } Line { SrcBlock "Sum1" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Sum3" SrcPort 1 DstBlock "Mux1" DstPort 3 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "emf_abc" DstPort 1 } Line { SrcBlock "Logical\nOperator3" SrcPort 1 DstBlock "Data Type Conversion1" DstPort 1 } Line { SrcBlock "Logical\nOperator4" SrcPort 1 DstBlock "Data Type Conversion3" DstPort 1 } Line { SrcBlock "Logical\nOperator5" SrcPort 1 DstBlock "Data Type Conversion4" DstPort 1 } Line { SrcBlock "Logical\nOperator6" SrcPort 1 DstBlock "Data Type Conversion5" DstPort 1 } Line { SrcBlock "Logical\nOperator7" SrcPort 1 DstBlock "Data Type Conversion6" DstPort 1 } Line { SrcBlock "Data Type Conversion2" SrcPort 1 Points [140, 0; 0, 130] DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Data Type Conversion4" SrcPort 1 Points [145, 0; 0, -60] DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Data Type Conversion1" SrcPort 1 Points [110, 0; 0, 95] DstBlock "Sum1" DstPort 1 } Line { SrcBlock "Data Type Conversion5" SrcPort 1 Points [110, 0; 0, -110] DstBlock "Sum1" DstPort 2 } Line { SrcBlock "Data Type Conversion3" SrcPort 1 Points [60, 0; 0, 60] DstBlock "Sum3" DstPort 1 } Line { SrcBlock "Data Type Conversion6" SrcPort 1 Points [60, 0; 0, -120; 120, 0] DstBlock "Sum3" DstPort 2 } Annotation { Name "/ha" Position [191, 35] } Annotation { Name "ha" Position [191, 98] } Annotation { Name "ha" Position [349, 99] } Annotation { Name "/hb" Position [349, 127] } Annotation { Name "hb" Position [349, 164] } Annotation { Name "/hc" Position [343, 191] } Annotation { Name "hc" Position [346, 231] } Annotation { Name "/ha" Position [344, 259] } Annotation { Name "/ha" Position [345, 299] } Annotation { Name "hb" Position [336, 331] } Annotation { Name "/hb" Position [342, 381] } Annotation { Name "hc" Position [334, 407] } Annotation { Name "/hc" Position [345, 449] } Annotation { Name "ha" Position [336, 476] } Annotation { Name "This module implements the following true table\n\n ha | hb | hc || emf_a | emf_b | emf_c\n --------------------------------------------------------------------------------\n0 0 0 0 0 0 \n0 0 1 0 -1 +1\n0 1 0 -1 +1 0\n0 1 1 -1 0 +1\n1 0 0 +1 0 -1\n1 0 1 +1 -1 0\n1 1 0 0 +1 -1\n1 1 1 0 0 0\n " Position [734, 449] } } } Block { BlockType Display Name "Display" Ports [1] Position [470, 400, 560, 430] Decimation "1" Lockdown off } Block { BlockType SubSystem Name "Firing System" Ports [2, 1] Position [870, 520, 930, 575] NamePlacement "alternate" MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Firing System" Location [87, 82, 986, 727] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [500, 55, 530, 70] Orientation "down" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Inport Name "In2" Position [25, 278, 55, 292] Port "2" IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Logic Name "\nr1" Ports [2, 1] Position [540, 187, 570, 218] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "\nr3" Ports [2, 1] Position [550, 372, 580, 403] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "\nr5" Ports [2, 1] Position [555, 542, 585, 573] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Reference Name "Compare\nTo Zero" Ports [1, 1] Position [350, 59, 395, 81] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero1" Ports [1, 1] Position [350, 149, 395, 171] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero2" Ports [1, 1] Position [350, 239, 395, 261] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero3" Ports [1, 1] Position [355, 329, 400, 351] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero4" Ports [1, 1] Position [360, 419, 405, 441] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero5" Ports [1, 1] Position [365, 509, 410, 531] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Demux Name "Demux2" Ports [1, 3] Position [80, 26, 85, 544] BackgroundColor "black" ShowName off Outputs "3" DisplayOption "bar" } Block { BlockType Mux Name "Mux3" Ports [6, 1] Position [755, 24, 760, 566] ShowName off Inputs "6" DisplayOption "bar" } Block { BlockType Outport Name "Out1" Position [785, 288, 815, 302] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "Compare\nTo Zero" SrcPort 1 Points [60, 0; 0, 5; 115, 0; 0, 10; 80, 0; 0, -15] DstBlock "Mux3" DstPort 1 } Line { SrcBlock "Compare\nTo Zero1" SrcPort 1 Points [60, 0; 0, 35] DstBlock "\nr1" DstPort 1 } Line { SrcBlock "Compare\nTo Zero2" SrcPort 1 Points [65, 0; 0, 45; 230, 0; 0, -45] DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Compare\nTo Zero3" SrcPort 1 Points [65, 0; 0, 40] DstBlock "\nr3" DstPort 1 } Line { SrcBlock "Compare\nTo Zero4" SrcPort 1 Points [65, 0; 0, 30; 115, 0; 0, 10; 35, 0; 0, -45; 115, 0] DstBlock "Mux3" DstPort 5 } Line { SrcBlock "Compare\nTo Zero5" SrcPort 1 Points [60, 0; 0, 30] DstBlock "\nr5" DstPort 1 } Line { SrcBlock "\nr1" SrcPort 1 Points [80, 0; 0, -45] DstBlock "Mux3" DstPort 2 } Line { SrcBlock "\nr3" SrcPort 1 Points [50, 0; 0, -50] DstBlock "Mux3" DstPort 4 } Line { SrcBlock "\nr5" SrcPort 1 Points [40, 0; 0, -40] DstBlock "Mux3" DstPort 6 } Line { SrcBlock "Demux2" SrcPort 1 Points [180, 0] Branch { Points [5, 0; 0, -45] DstBlock "Compare\nTo Zero" DstPort 1 } Branch { Points [0, 45] DstBlock "Compare\nTo Zero1" DstPort 1 } } Line { SrcBlock "Demux2" SrcPort 2 Points [180, 0] Branch { Points [0, -35] DstBlock "Compare\nTo Zero2" DstPort 1 } Branch { Points [0, 55] DstBlock "Compare\nTo Zero3" DstPort 1 } } Line { SrcBlock "Demux2" SrcPort 3 Points [175, 0] Branch { Points [0, -25] DstBlock "Compare\nTo Zero4" DstPort 1 } Branch { Points [0, 65] DstBlock "Compare\nTo Zero5" DstPort 1 } } Line { SrcBlock "In1" SrcPort 1 Points [0, 135] Branch { DstBlock "\nr1" DstPort 2 } Branch { Points [0, 185] Branch { DstBlock "\nr3" DstPort 2 } Branch { Points [0, 170] DstBlock "\nr5" DstPort 2 } } } Line { SrcBlock "In2" SrcPort 1 DstBlock "Demux2" DstPort 1 } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Out1" DstPort 1 } Annotation { Name "This module implements the following true table\n\n emf_a | emf_b | emf_c || Q1 | Q2 | Q3 | Q4 | Q5 | Q6\n ------------------------------------------------------------------------------------------------------------------\n 0 0 0 0 0 0 0 0 0\n 0 -1 +1 0 0 0 1 1 0\n -1 +1 0 0 1 1 0 0 0\n -1 0 +1 0 1 0 0 1 0\n +1 0 -1 1 0 0 0 0 1\n +1 -1 0 1 0 0 1 0 0\n 0 +1 -1 0 0 1 0 0 1\n 0 0 0 0 0 0 0 0 0\n " Position [874, 764] } Annotation { Position [662, 224] } } } Block { BlockType From Name "From" Position [570, 581, 610, 609] CloseFcn "tagdialog Close" GotoTag "Ia" TagVisibility "global" } Block { BlockType From Name "From controller" Position [655, 271, 695, 299] Orientation "left" CloseFcn "tagdialog Close" GotoTag "Pulses" TagVisibility "global" } Block { BlockType From Name "From1" Position [660, 605, 710, 635] CloseFcn "tagdialog Close" GotoTag "Position" TagVisibility "global" } Block { BlockType From Name "From2" Position [205, 596, 245, 624] CloseFcn "tagdialog Close" GotoTag "Speed" TagVisibility "global" } Block { BlockType Gain Name "Gain" Position [1075, 390, 1105, 420] Gain "30/pi" ParameterDataTypeMode "Inherit via internal rule" ParameterDataType "sfix(16)" ParameterScaling "2^0" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Goto Name "Goto" Position [510, 180, 550, 210] GotoTag "Ia" TagVisibility "global" } Block { BlockType Goto Name "Goto Controller" Position [970, 191, 1035, 219] GotoTag "Position" TagVisibility "global" } Block { BlockType Goto Name "Goto Inverter" Position [975, 535, 1015, 565] GotoTag "Pulses" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [610, 470, 650, 500] GotoTag "Iaref" TagVisibility "global" } Block { BlockType Goto Name "Goto2" Position [1130, 445, 1170, 475] GotoTag "Speed" TagVisibility "global" } Block { BlockType SubSystem Name "Hysterisis" Ports [1, 1] Position [705, 505, 775, 565] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Hysterisis" Location [2, 82, 1014, 744] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [170, 268, 200, 282] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Abs Name "Abs" Position [250, 260, 280, 290] SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add" Ports [2, 1] Position [360, 162, 390, 193] Inputs "+-" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "Compare\nTo Zero" Ports [1, 1] Position [465, 169, 510, 191] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">=" LogicOutDataTypeMode "boolean" ZeroCross on } Block { BlockType Reference Name "Compare\nTo Zero1" Ports [1, 1] Position [465, 299, 510, 321] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero2" Ports [1, 1] Position [465, 214, 510, 236] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero3" Ports [1, 1] Position [465, 344, 510, 366] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Constant Name "Constant" Position [170, 200, 200, 230] Value "0.05" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Product Name "Divide" Ports [2, 1] Position [260, 152, 290, 183] Inputs "**" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" RndMeth "Floor" SaturateOnIntegerOverflow off } Block { BlockType From Name "From" Position [170, 146, 210, 174] CloseFcn "tagdialog Close" GotoTag "Iaref" TagVisibility "global" } Block { BlockType Logic Name "Logical\nOperator" Ports [2, 1] Position [680, 222, 710, 253] Operator "OR" AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "Logical\nOperator1" Ports [2, 1] Position [590, 261, 620, 294] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Logic Name "Logical\nOperator2" Ports [2, 1] Position [590, 171, 620, 204] ShowName off AllPortsSameDT off OutDataTypeMode "boolean" OutDataTypeStr "boolean" } Block { BlockType Outport Name "Out1" Position [735, 233, 765, 247] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "From" SrcPort 1 DstBlock "Divide" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [35, 0; 0, -40] DstBlock "Divide" DstPort 2 } Line { SrcBlock "Divide" SrcPort 1 DstBlock "Add" DstPort 1 } Line { SrcBlock "Add" SrcPort 1 Points [30, 0] Branch { Points [0, 45] DstBlock "Compare\nTo Zero2" DstPort 1 } Branch { DstBlock "Compare\nTo Zero" DstPort 1 } } Line { SrcBlock "In1" SrcPort 1 Points [10, 0] Branch { DstBlock "Abs" DstPort 1 } Branch { Points [0, 80; 210, 0] Branch { DstBlock "Compare\nTo Zero3" DstPort 1 } Branch { Points [0, -45] DstBlock "Compare\nTo Zero1" DstPort 1 } } } Line { SrcBlock "Abs" SrcPort 1 Points [45, 0; 0, -90] DstBlock "Add" DstPort 2 } Line { SrcBlock "Compare\nTo Zero3" SrcPort 1 Points [30, 0; 0, -70] DstBlock "Logical\nOperator1" DstPort 2 } Line { SrcBlock "Logical\nOperator2" SrcPort 1 Points [25, 0; 0, 40] DstBlock "Logical\nOperator" DstPort 1 } Line { SrcBlock "Logical\nOperator1" SrcPort 1 Points [25, 0; 0, -35] DstBlock "Logical\nOperator" DstPort 2 } Line { SrcBlock "Logical\nOperator" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Compare\nTo Zero" SrcPort 1 DstBlock "Logical\nOperator2" DstPort 1 } Line { SrcBlock "Compare\nTo Zero2" SrcPort 1 Points [30, 0; 0, 45] DstBlock "Logical\nOperator1" DstPort 1 } Line { SrcBlock "Compare\nTo Zero1" SrcPort 1 Points [15, 0; 0, -115] DstBlock "Logical\nOperator2" DstPort 2 } } } Block { BlockType Reference Name "Multimeter" Ports [0, 1, 0, 0, 0, 1] Position [1055, 541, 1095, 579] SourceBlock "powerlib/Measurements/Multimeter" SourceType "MultimeterPSB" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" PhasorSimulation off OutputType "Complex" sel "11" L "16" Gain "1" yselected "{'Isw1: Universal Bridge'};" PSBOutputType "1" PSBequivalent "0" AxesSetting "[0,0.1,-100,100]" Display "1" SavedBlockNames "-11" } Block { BlockType Reference Name "Permanent Magnet\nSynchronous Machine" Ports [1, 1, 0, 0, 0, 3] Position [800, 293, 885, 367] DialogController "POWERSYS.PowerSysDialog" FontSize 11 SourceBlock "powerlib/Machines/Permanent Magnet\nSynchronous Machine" SourceType "Permanent Magnet Synchronous Machine" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" FluxDistribution "Trapezoidal" MechanicalLoad "Torque Tm" PresetModel "No" ShowDetailedParameters on Resistance "2.8750 " Inductance "8.5e-3" dqInductances "[8.5e-3, 8.5e-3]" MachineConstant "Flux linkage established by magnets (V.s)" Flux "0.175" VoltageCst "146.6077" TorqueCst "1.4" Flat "120" Mechanical "[ 0.8e-3, 1e-3, 4 ] " PolePairs "4" InitialConditions "[0,0, 0,0]" TsPowergui "0" TsBlock "-1" } Block { BlockType Saturate Name "Saturation" Position [515, 520, 545, 550] UpperLimit "50" LowerLimit "-50" } Block { BlockType Scope Name "Scope" Ports [6] Position [1140, 243, 1195, 417] Floating off Location [220, 69, 804, 696] Open off NumInputPorts "6" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" axes2 "%" axes3 "%" axes4 "%" axes5 "%" axes6 "Rotor speed" } TimeRange "0.5" YMin "-10~-10~-10~-200~6.519480519480538~-5000" YMax "10~10~10~200~14.51948051948054~5000" SaveName "ScopeData2" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "Scope1" Ports [1] Position [325, 404, 355, 436] Floating off Location [188, 390, 512, 629] Open off NumInputPorts "1" List { ListType AxesTitles axes1 "%" } SaveName "ScopeData7" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "Scope2" Ports [2] Position [265, 176, 295, 209] Floating off Location [301, 209, 805, 705] Open off NumInputPorts "2" ZoomMode "xonly" List { ListType AxesTitles axes1 "%" axes2 "%" } TimeRange "0.2" YMin "-1000~-40" YMax "1000~20" SaveName "ScopeData8" DataFormat "StructureWithTime" LimitDataPoints off SampleTime "0" } Block { BlockType SubSystem Name "Sliding mode control" Ports [1, 1] Position [395, 510, 455, 560] MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "Sliding mode control" Location [2, 82, 1014, 722] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [85, 88, 115, 102] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Sum Name "Add" Ports [2, 1] Position [360, 122, 390, 153] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add1" Ports [2, 1] Position [775, 112, 805, 143] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add2" Ports [2, 1] Position [475, 302, 505, 333] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Sum Name "Add3" Ports [2, 1] Position [795, 377, 825, 408] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "Compare\nTo Zero" Ports [1, 1] Position [570, 74, 615, 96] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero1" Ports [1, 1] Position [570, 159, 615, 181] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero2" Ports [1, 1] Position [260, 264, 305, 286] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "Compare\nTo Zero3" Ports [1, 1] Position [260, 349, 305, 371] ShowName off SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Constant Name "Constant1" Position [635, 95, 665, 125] OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant2" Position [640, 180, 670, 210] Value "-1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant3" Position [325, 285, 355, 315] OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant4" Position [330, 375, 360, 405] Value "-1" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant5" Position [320, 430, 350, 460] Value "50" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant6" Position [320, 480, 350, 510] Value "100" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant7" Position [320, 535, 350, 565] Value "100" OutDataType "sfix(16)" OutScaling "2^0" } Block { BlockType Derivative Name "Derivative" Position [205, 80, 235, 110] } Block { BlockType From Name "From" Position [350, 186, 390, 214] CloseFcn "tagdialog Close" GotoTag "Y1" TagVisibility "global" } Block { BlockType From Name "From1" Position [75, 251, 115, 279] CloseFcn "tagdialog Close" GotoTag "Z" TagVisibility "global" } Block { BlockType From Name "From2" Position [75, 301, 115, 329] CloseFcn "tagdialog Close" GotoTag "Y2" TagVisibility "global" } Block { BlockType From Name "From3" Position [90, 186, 130, 214] CloseFcn "tagdialog Close" GotoTag "C1" TagVisibility "global" } Block { BlockType From Name "From4" Position [605, 246, 645, 274] CloseFcn "tagdialog Close" GotoTag "C2" TagVisibility "global" } Block { BlockType From Name "From5" Position [605, 416, 645, 444] CloseFcn "tagdialog Close" GotoTag "C3" TagVisibility "global" } Block { BlockType From Name "From6" Position [605, 296, 645, 324] CloseFcn "tagdialog Close" GotoTag "Y1" TagVisibility "global" } Block { BlockType From Name "From7" Position [605, 466, 645, 494] CloseFcn "tagdialog Close" GotoTag "Y2" TagVisibility "global" } Block { BlockType From Name "From8" Position [605, 346, 645, 374] CloseFcn "tagdialog Close" GotoTag "X1" TagVisibility "global" } Block { BlockType From Name "From9" Position [605, 516, 645, 544] CloseFcn "tagdialog Close" GotoTag "X2" TagVisibility "global" } Block { BlockType Goto Name "Goto" Position [195, 25, 235, 55] GotoTag "Y1" TagVisibility "global" } Block { BlockType Goto Name "Goto1" Position [440, 65, 480, 95] GotoTag "Z" TagVisibility "global" } Block { BlockType Goto Name "Goto2" Position [300, 45, 340, 75] GotoTag "Y2" TagVisibility "global" } Block { BlockType Goto Name "Goto3" Position [840, 115, 880, 145] GotoTag "X1" TagVisibility "global" } Block { BlockType Goto Name "Goto4" Position [525, 305, 565, 335] GotoTag "X2" TagVisibility "global" } Block { BlockType Goto Name "Goto5" Position [390, 430, 430, 460] GotoTag "C1" TagVisibility "global" } Block { BlockType Goto Name "Goto6" Position [390, 480, 430, 510] GotoTag "C2" TagVisibility "global" } Block { BlockType Goto Name "Goto7" Position [390, 535, 430, 565] GotoTag "C3" TagVisibility "global" } Block { BlockType Product Name "Product" Ports [2, 1] Position [215, 177, 245, 208] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product1" Ports [2, 1] Position [450, 152, 480, 183] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product2" Ports [2, 1] Position [160, 257, 190, 288] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product3" Ports [2, 1] Position [705, 77, 735, 108] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product4" Ports [2, 1] Position [705, 162, 735, 193] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product5" Ports [2, 1] Position [405, 267, 435, 298] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product6" Ports [2, 1] Position [405, 352, 435, 383] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product7" Ports [3, 1] Position [695, 238, 740, 382] Inputs "3" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Product Name "Product8" Ports [3, 1] Position [695, 408, 740, 552] Inputs "3" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Outport Name "Out1" Position [850, 388, 880, 402] IconDisplay "Port number" OutDataType "sfix(16)" OutScaling "2^0" } Line { SrcBlock "In1" SrcPort 1 Points [30, 0] Branch { DstBlock "Derivative" DstPort 1 } Branch { Points [0, 90] DstBlock "Product" DstPort 1 } Branch { Points [0, -55] DstBlock "Goto" DstPort 1 } } Line { SrcBlock "Derivative" SrcPort 1 Points [25, 0] Branch { Labels [3, 0] Points [55, 0; 0, 35] DstBlock "Add" DstPort 1 } Branch { Points [0, -35] DstBlock "Goto2" DstPort 1 } } Line { SrcBlock "Product" SrcPort 1 Points [70, 0; 0, -50] DstBlock "Add" DstPort 2 } Line { SrcBlock "Add" SrcPort 1 Points [10, 0] Branch { Points [10, 0; 0, 20] DstBlock "Product1" DstPort 1 } Branch { Points [0, -60] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "From" SrcPort 1 Points [0, -25] DstBlock "Product1" DstPort 2 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Product2" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [5, 0; 0, -35] DstBlock "Product2" DstPort 2 } Line { SrcBlock "Compare\nTo Zero" SrcPort 1 DstBlock "Product3" DstPort 1 } Line { SrcBlock "Constant1" SrcPort 1 Points [5, 0; 0, -10] DstBlock "Product3" DstPort 2 } Line { SrcBlock "Compare\nTo Zero1" SrcPort 1 DstBlock "Product4" DstPort 1 } Line { SrcBlock "Product3" SrcPort 1 Points [10, 0; 0, 25] DstBlock "Add1" DstPort 1 } Line { SrcBlock "Product4" SrcPort 1 Points [10, 0; 0, -45] DstBlock "Add1" DstPort 2 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Goto3" DstPort 1 } Line { SrcBlock "Product2" SrcPort 1 Points [30, 0] Branch { DstBlock "Compare\nTo Zero2" DstPort 1 } Branch { Points [0, 85] DstBlock "Compare\nTo Zero3" DstPort 1 } } Line { SrcBlock "Compare\nTo Zero2" SrcPort 1 DstBlock "Product5" DstPort 1 } Line { SrcBlock "Constant3" SrcPort 1 Points [15, 0; 0, -10] DstBlock "Product5" DstPort 2 } Line { SrcBlock "Compare\nTo Zero3" SrcPort 1 DstBlock "Product6" DstPort 1 } Line { SrcBlock "Constant4" SrcPort 1 Points [0, -15] DstBlock "Product6" DstPort 2 } Line { SrcBlock "Product5" SrcPort 1 Points [10, 0; 0, 25] DstBlock "Add2" DstPort 1 } Line { SrcBlock "Product6" SrcPort 1 Points [10, 0; 0, -45] DstBlock "Add2" DstPort 2 } Line { SrcBlock "Add2" SrcPort 1 DstBlock "Goto4" DstPort 1 } Line { SrcBlock "From3" SrcPort 1 DstBlock "Product" DstPort 2 } Line { SrcBlock "Constant5" SrcPort 1 DstBlock "Goto5" DstPort 1 } Line { SrcBlock "Constant6" SrcPort 1 DstBlock "Goto6" DstPort 1 } Line { SrcBlock "Constant7" SrcPort 1 DstBlock "Goto7" DstPort 1 } Line { SrcBlock "From4" SrcPort 1 DstBlock "Product7" DstPort 1 } Line { SrcBlock "From6" SrcPort 1 DstBlock "Product7" DstPort 2 } Line { SrcBlock "From5" SrcPort 1 DstBlock "Product8" DstPort 1 } Line { SrcBlock "From7" SrcPort 1 DstBlock "Product8" DstPort 2 } Line { SrcBlock "From8" SrcPort 1 DstBlock "Product7" DstPort 3 } Line { SrcBlock "From9" SrcPort 1 DstBlock "Product8" DstPort 3 } Line { SrcBlock "Product7" SrcPort 1 Points [20, 0; 0, 75] DstBlock "Add3" DstPort 1 } Line { SrcBlock "Product8" SrcPort 1 Points [20, 0; 0, -80] DstBlock "Add3" DstPort 2 } Line { SrcBlock "Add3" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "Constant2" SrcPort 1 Points [5, 0; 0, -10] DstBlock "Product4" DstPort 2 } Line { SrcBlock "Product1" SrcPort 1 Points [60, 0] Branch { Points [0, -85] DstBlock "Compare\nTo Zero" DstPort 1 } Branch { DstBlock "Compare\nTo Zero1" DstPort 1 } } Annotation { Name "Speed \nregulator" Position [111, 130] } Annotation { Name "Y1=input (here error)\n\nY2=d/dt(Y1)\nZ=C1Y1+Y2\n\nX1=1 if ZY1 > 0\nX1=-1 if ZY1 < 0\n\nX2=1 if ZY2 > 0\nX2=-1 if ZY2 < 0\n\nOut=C2Y1X1+C3Y2X2" Position [144, 459] } } } Block { BlockType Reference Name "Three-Phase\nV-I Measurement" Ports [0, 2, 0, 0, 0, 3, 3] Position [150, 267, 200, 343] DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Measurements/Three-Phase\nV-I Measurement" SourceType "Three-Phase VI Measurement" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" VoltageMeasurement "phase-to-phase" SetLabelV off LabelV "Vabc" Vpu off CurrentMeasurement "yes" SetLabelI off LabelI "Iabc" Ipu off Pbase "100e6" Vbase "500e3" OutputType "Complex" PhasorSimulation off PSBequivalent "0" } Block { BlockType Reference Name "Three-Phase Source" Ports [0, 0, 0, 0, 0, 0, 3] Position [25, 267, 110, 343] DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Electrical\nSources/Three-Phase Source" SourceType "Three-Phase Source" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Voltage "430" PhaseAngle "0" Frequency "50" InternalConnection "Y" SpecifyImpedance on Resistance "0.8929" Inductance "16.58e-3" ShortCircuitLevel "100e6" BaseVoltage "25e3" XRratio "7" } Block { BlockType Reference Name "Total Harmonic\nDistorsion" Ports [1, 1] Position [390, 397, 445, 433] DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib_extras/Measurements/Total Harmonic\nDistorsion" SourceType "Total Harmonic Distortion" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" f1 "60" } Block { BlockType Reference Name "Universal Bridge" Ports [1, 0, 0, 0, 0, 3, 2] Position [540, 288, 605, 372] Orientation "left" ShowName off DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Power\nElectronics/Universal Bridge" SourceType "Universal Bridge" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Arms "3" SnubberResistance "5000" SnubberCapacitance "1e-6" Device "IGBT / Diodes" Ron "1e-3" Lon "0" ForwardVoltages "[ 0 0 ]" ForwardVoltage "0" GTOparameters "[ 10e-6 , 20e-6 ]" IGBTparameters "[ 1e-6 , 2e-6 ]" Measurements "All voltages and currents" converterType "Rectifier" } Block { BlockType Reference Name "Universal Bridge1" Ports [0, 0, 0, 0, 0, 3, 2] Position [270, 266, 330, 364] DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib/Power\nElectronics/Universal Bridge" SourceType "Universal Bridge" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Arms "3" SnubberResistance "1e6" SnubberCapacitance "10e-9" Device "Diodes" Ron "1e-3" Lon "0" ForwardVoltages "[ 0 0 ]" ForwardVoltage "0" GTOparameters "[ 10e-6 , 20e-6 ]" IGBTparameters "[ 1e-6 , 2e-6 ]" Measurements "None" converterType "Rectifier" } Block { BlockType Scope Name "Vab1" Ports [2] Position [520, 97, 555, 148] ShowName off Floating off Location [-28, 95, 1000, 814] Open off NumInputPorts "2" List { ListType AxesTitles axes1 "Line-Line voltage Vab" axes2 "%" } TimeRange "0.06" YMin "-1~-5" YMax "2~5" SaveName "ScopeData1" DataFormat "Structure" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "Vab2" Ports [1] Position [1135, 545, 1165, 575] Floating off Location [206, 285, 675, 644] Open off NumInputPorts "1" ZoomMode "xonly" List { ListType AxesTitles axes1 "Line-Line voltage Vab" } TimeRange "0.06" SaveName "ScopeData4" DataFormat "Structure" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "Vab4" Ports [1] Position [840, 470, 870, 500] ShowName off Floating off Location [1, 52, 1025, 737] Open off NumInputPorts "1" ZoomMode "xonly" List { ListType AxesTitles axes1 "Line-Line voltage Vab" } TimeRange "0.06" SaveName "ScopeData3" DataFormat "Structure" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "Vab5" Ports [1] Position [875, 590, 905, 620] ShowName off Floating off Location [1, 52, 1025, 737] Open off NumInputPorts "1" ZoomMode "xonly" List { ListType AxesTitles axes1 "Line-Line voltage Vab" } TimeRange "0.06" YMin "-1" YMax "2" SaveName "ScopeData6" DataFormat "Structure" LimitDataPoints off SampleTime "0" } Block { BlockType Scope Name "Vab6" Ports [1] Position [975, 485, 1005, 515] ShowName off Floating off Location [5, 43, 1033, 762] Open off NumInputPorts "1" ZoomMode "xonly" List { ListType AxesTitles axes1 "Line-Line voltage Vab" } TimeRange "0.06" YMin "-1" YMax "2" SaveName "ScopeData9" DataFormat "Structure" LimitDataPoints off SampleTime "0" } Block { BlockType Reference Name "powergui" Ports [] Position [45, 115, 141, 156] ShowName off Priority "2" UserDataPersistent on UserData "DataTag0" FontSize 11 SourceBlock "powerlib/powergui" SourceType "PSB option menu block" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimulationMode "Discrete" SampleTime "2.5e-6" frequency "60" SPID off SwTol "0" Interpol off x0status "blocks" echomessages off HookPort off FunctionMessages off EnableUseOfTLC off RestoreLinks "warning" frequencyindice "0" Frange "[0:2:500]" Ylog off Xlog on ShowGrid off save off variable "ZData" ZoomFFT on StartTime "0.0" cycles "1" DisplayStyle "1" fundamental "60" FreqAxis off MaxFrequency "1000" frequencyindicesteady "1" RmsSteady "1" display off Ts "0" methode off } Line { LineType "Connection" SrcBlock "Universal Bridge" SrcPort LConn1 DstBlock "Permanent Magnet\nSynchronous Machine" DstPort LConn1 } Line { LineType "Connection" SrcBlock "Universal Bridge" SrcPort LConn2 DstBlock "Permanent Magnet\nSynchronous Machine" DstPort LConn2 } Line { LineType "Connection" SrcBlock "Universal Bridge" SrcPort LConn3 DstBlock "Permanent Magnet\nSynchronous Machine" DstPort LConn3 } Line { SrcBlock "Constant4" SrcPort 1 DstBlock "Add3" DstPort 1 } Line { SrcBlock "Permanent Magnet\nSynchronous Machine" SrcPort 1 Points [5, 0] Branch { DstBlock "Bus\nSelector" DstPort 1 } Branch { Labels [1, 0] Points [0, -125] DstBlock "Bus\nSelector1" DstPort 1 } } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 1 Points [120, 0] Branch { DstBlock "Scope" DstPort 1 } Branch { Points [0, -95; -590, 0; 0, -25] DstBlock "Vab1" DstPort 2 } } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 2 DstBlock "Scope" DstPort 2 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 3 DstBlock "Scope" DstPort 3 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 4 DstBlock "Scope" DstPort 4 } Line { Name "" Labels [0, 0] SrcBlock "Bus\nSelector" SrcPort 5 DstBlock "Scope" DstPort 5 } Line { SrcBlock "Saturation" SrcPort 1 Points [30, 0] Branch { DstBlock "Add1" DstPort 1 } Branch { Points [0, -50] DstBlock "Goto1" DstPort 1 } } Line { SrcBlock "From" SrcPort 1 Points [10, 0] DstBlock "Add1" DstPort 2 } Line { SrcBlock "Add1" SrcPort 1 DstBlock "Hysterisis" DstPort 1 } Line { SrcBlock "Add3" SrcPort 1 DstBlock "Sliding mode control" DstPort 1 } Line { SrcBlock "Sliding mode control" SrcPort 1 DstBlock "Saturation" DstPort 1 } Line { SrcBlock "Multimeter" SrcPort 1 DstBlock "Vab2" DstPort 1 } Line { LineType "Connection" SrcBlock "Current Measurement" SrcPort RConn1 Points [35, 0] DstBlock "Universal Bridge" DstPort RConn1 } Line { SrcBlock "Hysterisis" SrcPort 1 Points [25, 0] Branch { DstBlock "Firing System" DstPort 1 } Branch { Points [0, -50] DstBlock "Vab4" DstPort 1 } } Line { SrcBlock "Decoder" SrcPort 1 Points [20, 0; 0, -15] Branch { Points [0, -45] DstBlock "Firing System" DstPort 2 } Branch { DstBlock "Vab5" DstPort 1 } } Line { SrcBlock "Firing System" SrcPort 1 Points [15, 0] Branch { DstBlock "Goto Inverter" DstPort 1 } Branch { Points [0, -50] DstBlock "Vab6" DstPort 1 } } Line { SrcBlock "From controller" SrcPort 1 Points [-25, 0; 0, 15] DstBlock "Universal Bridge" DstPort 1 } Line { SrcBlock "Bus\nSelector1" SrcPort 1 DstBlock "Goto Controller" DstPort 1 } Line { SrcBlock "From1" SrcPort 1 DstBlock "Decoder" DstPort 1 } Line { Name "" Labels [-1, 0] SrcBlock "Bus\nSelector" SrcPort 6 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Gain" SrcPort 1 Points [5, 0] Branch { DstBlock "Scope" DstPort 6 } Branch { DstBlock "Goto2" DstPort 1 } } Line { LineType "Connection" SrcBlock "C" SrcPort LConn1 Points [0, -10] Branch { ConnectType "DEST_SRC" DstBlock "Current Measurement" DstPort LConn1 } Branch { ConnectType "DEST_DEST" SrcBlock "Universal Bridge1" SrcPort RConn1 Points [0, -25; 40, 0] } } Line { SrcBlock "Current Measurement" SrcPort 1 Points [25, 0; 0, -35; -50, 0; 0, -30] Branch { DstBlock "Goto" DstPort 1 } Branch { Points [0, -85] DstBlock "Vab1" DstPort 1 } } Line { LineType "Connection" SrcBlock "C" SrcPort RConn1 Points [0, 5] Branch { ConnectType "DEST_SRC" Points [140, 0] DstBlock "Universal Bridge" DstPort RConn2 } Branch { ConnectType "DEST_DEST" SrcBlock "Universal Bridge1" SrcPort RConn2 Points [0, 25; 40, 0] } } Line { SrcBlock "Total Harmonic\nDistorsion" SrcPort 1 DstBlock "Display" DstPort 1 } Line { LineType "Connection" SrcBlock "Three-Phase Source" SrcPort RConn1 DstBlock "Three-Phase\nV-I Measurement" DstPort LConn1 } Line { LineType "Connection" SrcBlock "Three-Phase Source" SrcPort RConn2 DstBlock "Three-Phase\nV-I Measurement" DstPort LConn2 } Line { LineType "Connection" SrcBlock "Three-Phase Source" SrcPort RConn3 DstBlock "Three-Phase\nV-I Measurement" DstPort LConn3 } Line { LineType "Connection" SrcBlock "Three-Phase\nV-I Measurement" SrcPort RConn1 Points [25, 0; 0, -20] DstBlock "Universal Bridge1" DstPort LConn1 } Line { LineType "Connection" SrcBlock "Three-Phase\nV-I Measurement" SrcPort RConn2 Points [35, 0; 0, -5] DstBlock "Universal Bridge1" DstPort LConn2 } Line { SrcBlock "Three-Phase\nV-I Measurement" SrcPort 1 Points [15, 0; 0, -90] DstBlock "Scope2" DstPort 1 } Line { SrcBlock "Three-Phase\nV-I Measurement" SrcPort 2 Points [25, 0; 0, -90] DstBlock "Scope2" DstPort 2 } Line { LineType "Connection" SrcBlock "Current Measurement1" SrcPort LConn1 Points [-10, 0; 0, -90] DstBlock "Three-Phase\nV-I Measurement" DstPort RConn3 } Line { SrcBlock "Current Measurement1" SrcPort 1 Points [20, 0] Branch { Points [0, -30; 75, 0] DstBlock "Total Harmonic\nDistorsion" DstPort 1 } Branch { DstBlock "Scope1" DstPort 1 } } Line { LineType "Connection" SrcBlock "Current Measurement1" SrcPort RConn1 Points [0, -35; -50, 0; 0, -50] DstBlock "Universal Bridge1" DstPort LConn3 } Line { SrcBlock "Constant" SrcPort 1 Points [15, 0; 0, 50] DstBlock "Permanent Magnet\nSynchronous Machine" DstPort 1 } Line { SrcBlock "From2" SrcPort 1 Points [80, 0] DstBlock "Add3" DstPort 2 } Annotation { Name "Reference \nspeed (RPM)\nMax 2800" Position [242, 574] } Annotation { Name "PMBLDC Motor Drive in Normal Mode" Position [196, 63] ForegroundColor "orange" FontSize 18 } Annotation { Position [1154, 313] } } } MatData { NumRecords 1 DataRecord { Tag DataTag0 Data " %)30 . X ( 8 ( @ % \" $ ! 0 % 0 # $ !X <&]W97)G=6D FUE=&5R 9F9T=&]O;