Model { Name "scankopf" Version 7.5 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.47" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" MaxMDLFileLineLength 120 Created "Wed Aug 04 22:19:48 2010" Creator "Simplice" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "Simplice" ModifiedDateFormat "%" LastModifiedDate "Wed Sep 08 16:28:00 2010" RTWModifiedTimeStamp 205864074 ModelVersionFormat "1.%" ConfigurationManager "None" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on CovForceBlockReductionOff on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.10.0" Array { Type "Handle" Dimension 9 Simulink.SolverCC { $ObjectID 2 Version "1.10.0" StartTime "0.0" StopTime "10" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "ode45" SolverName "ode45" SolverJacobianMethodControl "auto" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 3 Version "1.10.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on DSMLogging on InspectSignalLogs off SaveTime on ReturnWorkspaceOutputs off StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" DSMLoggingName "dsmout" OutputOption "RefineOutputTimes" OutputTimes "[]" ReturnWorkspaceOutputsName "out" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.10.0" Array { Type "Cell" Dimension 7 Cell "BooleansAsBitfields" Cell "PassReuseOutputArgsAs" Cell "PassReuseOutputArgsThreshold" Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off UseIntDivNetSlope off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off EnforceIntegerDowncast on ExpressionFolding on BooleansAsBitfields off BitfieldContainerType "uint_T" EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero off NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" MaxStackSize "Inherit from target" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off } Simulink.DebuggingCC { $ObjectID 5 Version "1.10.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "warning" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" FixptConstUnderflowMsg "none" FixptConstOverflowMsg "none" FixptConstPrecisionLossMsg "none" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" SimStateInterfaceChecksumMismatchMsg "warning" StrictBusMsg "ErrorLevel1" BusNameAdapt "WarnAndRepair" NonBusSignalsTreatedAsBus "none" LoggingUnavailableSignals "error" BlockIODiagnostic "none" } Simulink.HardwareCC { $ObjectID 6 Version "1.10.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.10.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" EnableParallelModelReferenceBuilds off ParallelModelReferenceMATLABWorkerInit "None" ModelReferenceNumInstancesAllowed "Multi" PropagateVarSize "Infer from blocks in model" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off PropagateSignalLabelsOutOfModel off SupportModelReferenceSimTargetCustomCode off } Simulink.SFSimCC { $ObjectID 8 Version "1.10.0" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimCtrlC on SimExtrinsic on SimIntegrity on SimUseLocalCustomCode off SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 9 Version "1.10.0" Array { Type "Cell" Dimension 6 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" CustomRebuildMode "OnUpdate" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 10 Version "1.10.0" Array { Type "Cell" Dimension 19 Cell "IgnoreCustomStorageClasses" Cell "IgnoreTestpoints" Cell "InsertBlockDesc" Cell "SFDataObjDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrFcnArg" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" Cell "ReqsInCode" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrFcnArg "rt$I$N$M" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 11 Version "1.10.0" Array { Type "Cell" Dimension 17 Cell "GeneratePreprocessorConditionals" Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportNonFinite" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" ERTCodeCoverageTool "None" ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on GeneratePreprocessorConditionals "Disable all" CombineOutputUpdateFcns off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on SupportVariableSizeSignals off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off GenerateASAP2 off } PropName "Components" } } hdlcoderui.hdlcc { $ObjectID 12 Version "1.10.0" Description "HDL Coder custom configuration component" Name "HDL Coder" Array { Type "Cell" Dimension 1 Cell "" PropName "HDLConfigFile" } HDLCActiveTab "0" } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" ConfigPrmDlgPosition " [ 584, 261, 1464, 891 ] " } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType ActionPort InitializeStates "held" PropagateVarSize "Only when execution is resumed" ActionType "unset" } Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutMin "[]" OutMax "[]" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "fixdt(1,16,0)" ConRadixGroup "Use specified scaling" OutScaling "[]" OutDataTypeStr "Inherit: Inherit from 'Constant value'" LockScale off SampleTime "inf" FramePeriod "inf" PreserveConstantTs off } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" VectorParams1D on } Block { BlockType DiscreteStateSpace A "1" B "1" C "1" D "1" X0 "0" SampleTime "1" StateMustResolveToSignalObject off RTWStateStorageClass "Auto" Realization "auto" } Block { BlockType Display Format "short" Decimation "10" Floating off SampleTime "-1" } Block { BlockType Fcn Expr "sin(u[1])" SampleTime "-1" } Block { BlockType Gain Gain "1" Multiplication "Element-wise(K.*u)" ParamMin "[]" ParamMax "[]" ParameterDataTypeMode "Same as input" ParameterDataType "fixdt(1,16,0)" ParameterScalingMode "Best Precision: Matrix-wise" ParameterScaling "[]" ParamDataTypeStr "Inherit: Same as input" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType If NumInputs "1" IfExpression "u1 > 0" ShowElse on ZeroCross on SampleTime "-1" } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" LockScale off SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchInputForFeedbackSignals off Interpolate on } Block { BlockType Logic Operator "AND" Inputs "2" IconShape "rectangular" AllPortsSameDT on OutDataTypeMode "Logical (see Configuration Parameters: Optimization)" LogicDataType "uint(8)" OutDataTypeStr "Inherit: Logical (see Configuration Parameters: Optimization)" SampleTime "-1" } Block { BlockType Mux Inputs "4" DisplayOption "none" UseBusObject off BusObject "BusObject" NonVirtualBus off } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" VarSizeSig "Inherit" SampleTime "-1" OutMin "[]" OutMax "[]" DataType "auto" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: auto" LockScale off SignalType "auto" SamplingMode "auto" SourceOfInitialOutputValue "Dialog" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Product Inputs "2" Multiplication "Element-wise(.*)" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType "S-Function" FunctionName "system" SFunctionModules "''" PortCounts "[]" SFunctionDeploymentMode off } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off CheckFcnCallInpInsideContextMsg off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on AccumDataTypeStr "Inherit: Inherit via internal rule" OutMin "[]" OutMax "[]" OutDataTypeMode "Same as first input" OutDataType "fixdt(1,16,0)" OutScaling "[]" OutDataTypeStr "Inherit: Same as first input" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType UniformRandomNumber Minimum "-1" Maximum "1" Seed "0" SampleTime "-1" VectorParams1D on } Block { BlockType UnitDelay X0 "0" SampleTime "1" StateMustResolveToSignalObject off RTWStateStorageClass "Auto" } } System { Name "scankopf" Location [342, 765, 992, 916] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "a4letter" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" ReportName "simulink-default.rpt" SIDHighWatermark 143 Block { BlockType Sum Name "Add" SID 35 Ports [2, 1] Position [190, 52, 220, 83] InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^-10" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType Reference Name "Compare\nTo Zero" SID 38 Ports [1, 1] Position [590, 315, 620, 345] BlockMirror on NamePlacement "alternate" LibraryVersion "1.216" SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero" SourceType "Compare To Zero" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<=" LogicOutDataTypeMode "uint8" ZeroCross on } Block { BlockType Constant Name "Constant" SID 31 Position [25, 25, 55, 55] OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType Constant Name "Constant1" SID 46 Position [35, 540, 65, 570] Value "109" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType DiscreteStateSpace Name "Discrete State-Space" SID 23 Position [245, 371, 355, 409] A "0" D "0" SampleTime "-1" } Block { BlockType Display Name "Display" SID 129 Ports [1] Position [995, 635, 1085, 665] Decimation "1" Lockdown off } Block { BlockType Display Name "Display2" SID 133 Ports [1] Position [860, 430, 950, 460] Decimation "1" Lockdown off } Block { BlockType Fcn Name "Fcn1" SID 20 Position [245, 304, 355, 336] BlockMirror on NamePlacement "alternate" Expr "u(3)+u(2)-u(1)" } Block { BlockType Fcn Name "Fcn2" SID 58 Position [245, 234, 360, 266] Expr "u(2)*exp(u(3)/u(1))" } Block { BlockType Fcn Name "Fcn4" SID 131 Position [745, 474, 815, 506] Expr "-u(1)+u(2)+u(3)" } Block { BlockType Reference Name "Fuzzy Logic \nController \nwith Ruleviewer" SID 127 Ports [1, 1] Position [875, 495, 935, 545] LibraryVersion "1.179" SourceBlock "fuzblock/Fuzzy Logic \nController \nwith Ruleviewer" SourceType "FIS" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" fismatrix "scankopf" Ts "1" } Block { BlockType Gain Name "Gain" SID 141 Position [95, 21, 155, 59] Gain "8.6" ParameterDataTypeMode "Inherit via internal rule" ParameterDataType "fixdt(1, 16)" ParameterScaling "2^0" ParamDataTypeStr "Inherit: Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType If Name "If" SID 70 Ports [1, 2] Position [255, 176, 355, 214] BlockMirror on NamePlacement "alternate" } Block { BlockType SubSystem Name "If Action\nSubsystem" SID 66 Ports [1, 1, 0, 0, 0, 0, 0, 1] Position [270, 97, 340, 133] BlockMirror on NamePlacement "alternate" LibraryVersion "1.216" TreatAsAtomicUnit on MinAlgLoopOccurrences off PropExecContextOutsideSubsystem off RTWSystemCode "Auto" FunctionWithSeparateData off Opaque off RequestExecContextInheritance off MaskHideContents off System { Name "If Action\nSubsystem" Location [342, 471, 840, 771] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "A4" PaperUnits "centimeters" TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" SID 67 Position [75, 78, 105, 92] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Block { BlockType ActionPort Name "Action Port" SID 68 Position [170, 15, 229, 43] ActionType "then" } Block { BlockType Outport Name "Out1" SID 69 Position [325, 78, 355, 92] IconDisplay "Port number" OutDataType "fixdt(1, 16)" OutScaling "2^0" } Line { SrcBlock "In1" SrcPort 1 DstBlock "Out1" DstPort 1 } } } Block { BlockType Logic Name "Logical\nOperator" SID 37 Ports [2, 1] Position [505, 307, 535, 338] BlockMirror on NamePlacement "alternate" AllPortsSameDT off OutDataTypeMode "boolean" LogicDataType "fixdt(0, 8)" OutDataTypeStr "boolean" } Block { BlockType Mux Name "Mux" SID 27 Ports [3, 1] Position [370, 301, 375, 339] BlockMirror on NamePlacement "alternate" ShowName off Inputs "3" DisplayOption "bar" } Block { BlockType Mux Name "Mux1" SID 59 Ports [3, 1] Position [215, 231, 220, 269] ShowName off Inputs "3" DisplayOption "bar" } Block { BlockType Mux Name "Mux2" SID 136 Ports [3, 1] Position [995, 501, 1000, 539] ShowName off Inputs "3" DisplayOption "bar" } Block { BlockType Mux Name "Mux3" SID 132 Ports [3, 1] Position [675, 471, 680, 509] ShowName off Inputs "3" DisplayOption "bar" } Block { BlockType Product Name "Product" SID 40 Ports [2, 1] Position [440, 302, 470, 333] BlockMirror on NamePlacement "alternate" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutDataType "fixdt(1, 16)" OutScaling "2^0" OutDataTypeStr "Inherit: Inherit via internal rule" SaturateOnIntegerOverflow off } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator" SID 6 Ports [0, 1] Position [50, 234, 80, 266] NamePlacement "alternate" Amplitude ".02" Period "10" PulseWidth "10" PhaseDelay "0" SampleTime "0.1" } Block { BlockType "S-Function" Name "S-Function" SID 143 Ports [1, 1] Position [1010, 240, 1070, 270] FunctionName "animScankopf" EnableBusSupport off } Block { BlockType UniformRandomNumber Name "Uniform Random\nNumber" SID 36 Position [25, 74, 55, 106] Minimum "-3" Maximum "3" SampleTime "0.1" } Block { BlockType UnitDelay Name "Unit Delay" SID 138 Position [260, 473, 295, 507] SampleTime "-1" } Block { BlockType Scope Name "signal_sensor1" SID 115 Ports [1] Position [1040, 504, 1070, 536] Floating off Location [1316, 254, 2039, 1087] Open off NumInputPorts "1" ZoomMode "yonly" List { ListType AxesTitles axes1 "%" } TimeRange "70" YMin "0" YMax "130" SaveName "ScopeData1" DataFormat "StructureWithTime" SampleTime "0" } Line { SrcBlock "Mux" SrcPort 1 DstBlock "Fcn1" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Gain" DstPort 1 } Line { SrcBlock "Compare\nTo Zero" SrcPort 1 DstBlock "Logical\nOperator" DstPort 2 } Line { SrcBlock "Add" SrcPort 1 Points [355, 0; 0, 205] Branch { Points [0, 40] DstBlock "Logical\nOperator" DstPort 1 } Branch { Points [-90, 0; 0, 35] DstBlock "Product" DstPort 1 } } Line { SrcBlock "Logical\nOperator" SrcPort 1 DstBlock "Product" DstPort 2 } Line { SrcBlock "Fcn2" SrcPort 1 Points [35, 0; 0, 60] DstBlock "Mux" DstPort 1 } Line { SrcBlock "Mux1" SrcPort 1 DstBlock "Fcn2" DstPort 1 } Line { SrcBlock "Pulse\nGenerator" SrcPort 1 DstBlock "Mux1" DstPort 2 } Line { SrcBlock "Uniform Random\nNumber" SrcPort 1 Points [40, 0; 0, -15] DstBlock "Add" DstPort 2 } Line { SrcBlock "Constant1" SrcPort 1 Points [590, 0] DstBlock "Mux3" DstPort 3 } Line { SrcBlock "Discrete State-Space" SrcPort 1 Points [40, 0] Branch { Points [0, 0] Branch { Points [0, 45; -310, 0; 0, -175] DstBlock "Mux1" DstPort 3 } Branch { Points [220, 0] Branch { Points [0, 90] DstBlock "Mux3" DstPort 1 } Branch { Points [30, 0; 0, -30] Branch { Points [0, -30] DstBlock "Compare\nTo Zero" DstPort 1 } Branch { Points [330, 0] DstBlock "Mux2" DstPort 1 } } } } Branch { Points [0, -60] DstBlock "Mux" DstPort 3 } } Line { SrcBlock "Fcn1" SrcPort 1 Points [-20, 0; 0, 70] DstBlock "Discrete State-Space" DstPort 1 } Line { SrcBlock "Product" SrcPort 1 Points [-15, 0] Branch { DstBlock "Mux" DstPort 2 } Branch { Points [0, -125; -15, 0] Branch { DstBlock "If" DstPort 1 } Branch { Points [0, -80] DstBlock "If Action\nSubsystem" DstPort 1 } } } Line { SrcBlock "If" SrcPort 1 Points [-25, 0; 0, -25; 80, 0] DstBlock "If Action\nSubsystem" DstPort ifaction } Line { SrcBlock "If Action\nSubsystem" SrcPort 1 Points [-105, 0; 0, 65] Branch { Points [0, 60] DstBlock "Mux1" DstPort 1 } Branch { Points [-140, 0; 0, 310] DstBlock "Unit Delay" DstPort 1 } } Line { SrcBlock "Mux3" SrcPort 1 DstBlock "Fcn4" DstPort 1 } Line { SrcBlock "Fcn4" SrcPort 1 Points [10, 0] Branch { Points [15, 0] DstBlock "Display2" DstPort 1 } Branch { Points [0, 30; 20, 0] Branch { DstBlock "Fuzzy Logic \nController \nwith Ruleviewer" DstPort 1 } Branch { Points [0, 100; 130, 0] DstBlock "Mux2" DstPort 3 } } } Line { SrcBlock "Fuzzy Logic \nController \nwith Ruleviewer" SrcPort 1 Points [15, 0] Branch { DstBlock "Mux2" DstPort 2 } Branch { Points [0, 130] DstBlock "Display" DstPort 1 } } Line { SrcBlock "Mux2" SrcPort 1 Points [5, 0] Branch { DstBlock "signal_sensor1" DstPort 1 } Branch { Points [0, -230; -25, 0; 0, -35] DstBlock "S-Function" DstPort 1 } } Line { SrcBlock "Unit Delay" SrcPort 1 DstBlock "Mux3" DstPort 2 } Line { SrcBlock "Gain" SrcPort 1 Points [0, 20] DstBlock "Add" DstPort 1 } } }